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The present disclosure relates to a semiconductor device. More particularly, the present disclosure relates to a vertically stacked semiconductor device.
B. Background of the Invention
In a conventional semiconductor device, a semiconductor chip and a substrate are electrically connected to each other by a bonding wire. However, in recent years, as the integration density of the semiconductor device is increased and the size of the package is decreased, the connection between the semiconductor chip and the substrate becomes more difficult to accomplish due to packaging limitations.
On the other hand, the three-dimensional packaging technology, which stacks the semiconductor chips and the substrates two-dimensionally and three-dimensionally, is a feasible solution. For example, in a semiconductor device disclosed in JP-A-2013-91695, the package is configured in a structure in which a number of semiconductor chips are stacked and electrically connected to each other.
As a semiconductor device is further downsized and a semiconductor element is integrated more densely, a flip-chip package 0b46394aab